1. Field
The embodiments herein are directed to assisting of placement design for parts to be mounted on a printed circuit board.
2. Description of Related Art
An increasing number of pins are being used with LSI (Large Scale Integration), and as a result, packaging called BGA (Ball Grid Array) has come to be often used for packaging. With BGA, ball-shaped electrodes of solder are arrayed in a grid fashion. Note that a package wherein flat electrode pads are arrayed in a grid fashion instead of the solder balls with BGA may be referred to as LGA (Lad Grid Array). Grid array packaging such as BGA and LGA allow a greater number of electrodes to be provided as compared with a QFP (Quad Flat Package) where terminals are extended from the four sides.
With grid array packaging, a great number of electrodes are arrayed densely. Accordingly, wiring design for the printed circuit board side which mounts the grid array package is more difficult. Various contrivances have been made regarding wiring on the printed circuit board which mounts the grid array package, examples of which include Japanese Patent No. 3,745,176, Japanese Laid-open Patent Publication No. 2000-261110, Japanese Laid-open Patent Publication No. 2003-218540, and Japanese Laid-open Patent Publication No. 2001-53185.
Signal transmission speeds and signal rising speeds are increasing. Accordingly, the number of decoupling capacitors required for one grid array package to prevent simultaneous switching output noise is also increasing. For example, 350 or more decoupling capacitors may be required for one 1,500-pin class grid array package. Decoupling capacitors for allowing such a grid array package to operate are placed very close to the connection terminals of electrodes of the grid array package. Accordingly, a great number of decoupling capacitors will be placed in a narrow range corresponding to the size of the grid array package.
However, with conventional printed circuit board design, placement of decoupling capacitors has been performed manually by a designer using CAD (Computer Aided Design), which has been extremely time and labor consuming. In particular, the increase in the number of decoupling capacitors required has become a factor which markedly increases the number of part placement operations in printed circuit board design.